Typical switching regulators include buck converter, boost converter, buck-boost converter and inverter converter FIG. 1 shows a conventional buck converter, which includes two transistor switches Q1 and Q2 respectively controlled by an up-gate control signal UG and a low-gate control signal LG. The switching of the transistors Q1 and Q2 controls the current amount and direction on the inductor L, so that power is transmitted to the output terminal OUT. The up-gate control signal UG and low-gate control signal LG for example can be PWM (pulse width modulated) or PFM (pulse frequency modulated) signals generated by methods well known to those skilled in this art, according to a feedback signal FB obtained from the output terminal OUT. FIGS. 2 and 3 respectively show a boost type switching regulator 2 and an inverter type switching regulator 3.
Referring to FIG. 1 in conjunction with FIG. 4, for better power conversion efficiency, U.S. Pat. No. 6,580,258 proposes a concept as shown in FIG. 4, in which the transistors Q1 and Q2 are properly controlled so that the Q2 is turned OFF when the direction of the inductor current is about to change from positive to negative. Thus, there is no power loss from the output terminal OUT. As shown in the figure, there is a time period T wherein the transistors Q1 and Q2 are both OFF, which is called the “sleep mode”.
However, this prior art has its drawback. When the transistors Q1 and Q2 are both OFF, entering the sleep mode, the actual waveforms of the current IL flowing on the inductor L and the voltage at the node VPH are not ideal. As shown in FIG. 5, when the transistors Q1 and Q2 are both OFF, the current IL and the voltage VPH present ringing waveforms.
In view of the foregoing drawback, the present invention proposes a switching regulator with reduced switching ringing, and a method for controlling the switching regulator to reduce ringing.